On pages 47 to 79 of my textbook Phase-Locked Loop Circuit Design, published 1991 by Prentice Hall, Inc. of Englewood Cliffs, N.J., I describe a number of prior art phase detectors which constitute some of the background of this invention, some of which are described herein with reference to FIGS. 1a through 3c.
In Generalized Phase Comparators for Improved Phase-Locked Loop Acquisition, IEEE Transactions on Communication Technology, Volume COM-19, No. 6, pp. 145-148, December 1971, the author James F. Oberst explains a technique to realize a wide-range, wide-bandwidth phase detector, but which introduces nonlinearities in the detector's response, a problem which Oberst recognized. The nonlinearities become especially pronounced with high-speed clock signals.
In my U.S. Pat. No. 4,902,920 issued on Feb. 20, 1990, for "Extended Range Phase Detector," I disclose a wide-range, wide-bandwidth, linear phase detector, which utilizes a three-state phase detector. The feedback loop of that phase detector, however, prevents it from handling high-speed clock signals